This application claims priority to GB Patent Application No. 1414546.0 filed 15 Aug. 2014, the entire content of which is hereby incorporated by reference.
The present technique relates to the field of data processing. More particularly, it relates to a data processing apparatus having performance monitoring circuits and capable of executing instructions at one of a plurality of privilege levels.
A data processing apparatus may have a number of performance monitoring circuits for monitoring various aspects of the performance of the apparatus. For example, the performance monitoring circuits may include counters which count the occurrence of various events within the processor, such as the number of instructions that have been executed, the number of cache accesses, etc, which can provide information about processing performance. This maybe useful for example for verifying whether software is executed efficiently, or for load balancing between multiple processing circuits.
Some processing apparatuses may support execution of program instructions at a number of different privilege levels, where the processing circuitry when executing at one privilege level may have access to resources or other capabilities that it would not have when executing at a different privilege level. The present technique seeks to improve performance monitoring in such a system.